INTERNATIONAL JOURNAL OF RESEARCH AND INNOVATION IN SOCIAL SCIENCE (IJRISS)
ISSN No. 2454-6186 | DOI: 10.47772/IJRISS | Volume IX Issue XI November 2025
Heat Sink Geometry Comparison for Energy Efficiency in Compact
Electronics: Implications for Electricity Savings and CO₂ Emission
Reduction
Zairul Anuar bin Zamri., Muhammad Zulfattah bin Zakaria., Abdul Rafeq bin Saleman., Norain binti
Idris
Faculty of Mechanical Technology and Engineering, Universiti Teknikal Malaysia Melaka
Received: 22 November 2025; Accepted: 29 November 2025; Published: 03 December 2025
ABSTRACT
The rising global demand for digital technology has increased electricity consumption across all levels of
electronic usage, from household devices to large-scale data centers. Improving the energy efficiency of compact
electronics is therefore essential for reducing power demand and lowering the CO₂ emissions associated with
electricity generation. This study compares two copper heat sink geometries—fin-type and pin-type—to evaluate
their influence on thermal management and energy-use effectiveness in a miniature Application-Specific
Integrated Circuit (ASIC) device exposed to laminar airflow for heat dissipation. Laminar airflow at a speed of
0.5ꢀm/s was selected to simulate typical compact electronic ventilation. Using infrared thermography and
onboard sensing, the study examines how geometric variations affect heat dissipation, operational temperature,
and computational efficiency under a constant 100ꢀW load. Results show that the 9-pin heat sink significantly
reduces MOSFET temperature and increases computational output compared to both the 3-fin design and
baseline conditions without a heat sink. These improvements translate into lower thermal losses, enabling the
device to operate more efficiently with reduced electrical strain. By demonstrating that simple, low-cost
geometric enhancements can meaningfully decrease heat accumulation and improve energy efficiency, this
research highlights a practical pathway for reducing electricity consumption and the associated CO₂ emissions
generated from fossil-fuel-based power systems. Moreover, the design insights are supported by recent advances
in pin-fin design and optimization, reinforcing their relevance for sustainable electronics.
INTRODUCTION
The rising global demand for digital technology has increased electricity consumption across all levels of
electronic usage, from household devices to large-scale data centers, making energy efficiency in electronics a
key lever for reducing power demand and associated CO₂ emissions. Recent assessments show that data-center
electricity demand has grown and contributes materially to global electricity use, while uncertainty in estimates
underscores the need for device-level efficiency improvements (Mytton & Ashtine, 2022; Khosravi et al., 2024).
Improving thermal management in compact electronics reduces electrical losses and auxiliary cooling
requirements, directly lowering energy consumption and carbon intensity of operation (Zhang et al., 2022;
Noussan et al., 2024). Heat‑sink geometry—particularly pin‑fin versus plate‑fin structures—strongly influences
convective surface area, boundary‑layer disruption, and heat‑transfer efficiency under forced laminar flow, with
recent studies reporting consistent performance advantages for optimized pin‑fin arrays (Rahman et al., 2024;
Yang et al., 2024; Qin et al., 2024; Zohora et al., 2024; Linke et al., 2024; Nawaz et al., 2022). This study
therefore evaluates two copper heat‑sink geometries (3‑fin and 9‑pin) under laminar airflow (0.5 m/s) to quantify
differences in MOSFET temperature, computational efficiency, and the implied electricity‑use and
CO₂‑reduction benefits when such device‑level improvements are scaled.
METHODOLOGY
Two copper heat sink geometries—a 3-fin structure and a 9-pin structure—were fabricated from a 6 mm × 6 mm
copper bar using EDM wire cutting. Each heat sink maintained a consistent 36 mm² contact area with the
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