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Dual Quaternion Hardware Accelerator for RISC-V based System

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International Journal of Research and Scientific Innovation (IJRSI) | Volume IX, Issue V, May 2022 | ISSN 2321–2705

Dual Quaternion Hardware Accelerator for RISC-V based System

Rajeshwari B, Rithvik Kumar, Shweta P Hegde, Manav Eswar Prasad, Vandhya D M, Bajrangabali B
Department of Electronics and Communication, PES University, India

IJRISS Call for paper

Abstract— In this work, a hardware accelerator has been developed for a RISC-V processor. The ‘Parashu’ Shakti processor is the SoC of choice for application testing and development. The IP is designed to speed up applications involving dual quaternion operations. Our module primarily aids dual quaternion multiplication which further helps with other complex operations like translation, rotation and transformation. Two solutions have been proposed for the same, i.e. either a quaternion IP if power and resource utilization is a concern, or a dual quaternion IP if performance gain is the primary objective. The latter is however at the expense of relatively more resource utilization. The former IP takes longer execution time to perform the same task but is more versatile since it can be used in applications involving both quaternion and dual quaternion operations.

Keywords— RISC-V, Dual Quaternion, Shakti Processor, Hardware Accelerator, Robotics

I.INTRODUCTION

In modern society, RISC-V is an emerging technology and is rapidly developing as it is an open ISA that offers stability, scalability and security. RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. The dynamic and modular aspects make RISC-V ISA a compelling choice for IP development[1],[2]. The SHAKTI Processor Program, based on the RISC-V ISA, was started as an academic initiative back in 2014 by IIT Madras. The monopoly of a handful of companies in the processor market and the growing demand for customizable SoC’s and ASIC’s (Application Specific Integrated Chips) was the motivation behind the development of the open-source processor ecosystem.
Dual quaternion is a combination of Quaternions and dual number theory ,a tool for expressing and analyzing the physical properties of rigid bodies. It is considered to be better than the conventional Cartesian coordinate system since it is singularity free, avoids Gimbal lock(loss of a degree of freedom in a rotation system when two axis of rotation coincide), yields the shortest interpolation path for the system and it can formulate the problem more concisely with greater precision, since 4 states per quaternion are used to represent a 3- dimensional space.





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