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International Journal of Research and Scientific Innovation (IJRSI) | Volume VI, Issue VI, June 2019 | ISSN 2321–2705

Memory Circuits Used in Digital VLSI: Comparison

Manjukiran B1, Thrapthi Shetty2

IJRISS Call for paper

1,2Assistant Professor, Department of Electronics & Communication, A.J Institute of Engineering & Technology, Kottara Chowki, Mangalore, Karnataka, India

Abstract: Note on differences between different semiconductor volatile and non-volatile memory. Comparison is done for parameters such as volatility, read & write speed, structure and power dissipation. Based on the parameters compared applications for these memory cells has been detailed. The paper helps to make a choice based on the application and comparison made.

I. INTRODUCTION

Semiconductor memory cells are adept for storing huge digital data, required for digitized systems. It is a vital component in current technical world. Due to rapid growth and requirement for faster memories, various types of semiconductor memories have been emerged. The two different types of memories are Volatile memory (holds the data only when the device is on) and non-volatile memory (holds data even when the device is off).

1. Volatile memory

Volatile memory requires power supply to sustain the information; it preserves its data while powered but loses the data when power supply is interrupted. Even though volatile memory loses its data while power is interrupted, being a faster memory has various uses such as primary memory in computers, volatile memory can safeguard delicate information, since the data cannot be obtained once the device is turned off.

Dynamic Random Access Memory

Dynamic random-access memory stores one bit of data in different capacitor in the integrated circuit. The capacitor is charged or discharged depending on the data it holds, the charged and discharged state can be used to represent the two distinct states of a bit each, either 0 and 1-bit DRAM circuit shown in Fig 2. The capacitor CS stores the data for the cell and Read/Write access is given to the cell via Transistor M1. The capacitance for each bit line per length is given by CB. Cells are etched on silicon wafer as an array with columns representing bits and rows representing a word.