Floating Admittance Matrix Modelling Approach to BJT

International Journal of Research and Scientific Innovation (IJRSI) | Volume VI, Issue X, October 2019 | ISSN 2321–2705

Floating Admittance Matrix Modelling Approach to BJT

Dr. Meena Singh¹, Pragati Prerna²

¹Assistant Professor in Electronics Department, BIT, Mesra, Ranchi, India
²Department of ECE University Polytechnic, B.I.T. Mesra, Ranchi, India

Abstract: The floating admittance matrix (FAM) approach is an elegant method that provides unified approach to analysis of different terminal functions such as impedances, and gains or ratios of voltages, currents and powers of both active and passive network with ease. The zero sum property of the floating admittance matrix provides a check to the researchers to proceed further or re observe the first equation itself. All transfer functions are represented as cofactors of the floating admittance matrix of the circuit.

Key words: Amplifier, Common emitter, Floating Admittance Matrix, Zero Sum property, Cofactors.

I. INTRODUCTION

The well-known conventional and convenient low frequency model of the BJT is h-parameter and hybrid-model. For the purpose of deriving the floating admittance model (FAM) of the BJT, the h-parameters model is considered [1-18]. The same floating admittance matrix is used for the derivation of its voltage gain, current gain, and power gain, input impedance and output impedance of BJT amplifier in any of its three configurations to demonstrate the beauty and superiority this approach[22-24].
If any one of the three terminals of a BJT is taken common to both of its input and output sides, then it can be assumed as four terminal of two port network as indicated in Fig. 1. Here, the emitter terminal is common to both input and output sides. The base, collector and emitter terminals have been assigned digital numbers 1, 2, and 3 respectively to be used in the derivation of the floating admittance matrix of the BJT.

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