A Review on Scrubbing Techniques in Static Random Access Memory Based Field Programmable Gate Array

International Journal of Research and Scientific Innovation (IJRSI) | Volume VI, Issue XI, November 2019 | ISSN 2321–2705

A Review on Scrubbing Techniques in Static Random Access Memory Based Field Programmable Gate Array

O.E. Haruna^1*, I. Mafiana², A.M. Ogunleye³, A.Y. Ihiabe⁴, S.Magaji⁵

^1,2,3,4Centre for Satellite Technology Development (National Space Research and Development Agency), Abuja, Nigeria.
⁵Computer Engineering Department, Ahmadu Bello University, Nigeria

Abstract: Static Random Access Memory (SRAM) based Field Programmable Gate Array (FPGA) are semiconductor devices with large logic resources, programmable interconnects, and other resources making the device re-programmable thus, having broad applicability. SRAM-based FPGAs are sensitive to radiation induced Single Event Upset (SEU) within the configuration memory, whereby a fault as a result of radiation strike from high energetic particles causes the logic state of the SRAM cell to flip. The configuration memory defines the operation of the Configurable Logic Blocks (CLBs), routing resources, Input-Output Blocks (IOBs), and other FPGA resources and upset in the configuration memory can change the operation of the circuit. Therefore configuration memory scrubbing is a solution to mitigate against SEU. In this paper we present a review of existing scrubbing techniques, the parameters considered, results obtained and possible modifications are suggested as well.

Keywords: SRAM, FPGA, Configuration memory, Scrubbing, Single event upset.

I. INTRODUCTION

SRAM-based FPGAs are Complementary Metal Oxide Semiconductor (CMOS) devices having thousands to millions system logic gates with hundreds of millions of configuration bits dominating the SRAM cells and the cells are composed of transistors linked with interconnect wires [11]. Unlike Application Specific Integrated Circuits (ASICs), whose functions cannot be altered after fabrication, SRAM-based FPGAs have the advantage of being reprogrammed providing high computational density and efficiency for many computing applications by allowing circuits to be customized to any application of interest [22].FPGAs are versatile devices that allow a function to be implemented by mapping it into the FPGA’s pre-existing logic resources. The mapping is referred to as its Configuration [3], SRAM-based FPGAs are more prone to soft errors in the form of SEU since radiation strike in the configuration memory has a permanent effect on the functionality of the mapped design [17].

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